Qwen3.8-27B-NVFP4-NVLC-Lossless

Qwen3.8-27B-NVFP4-NVLC-Lossless

This repository is a lossless, tiled NVLC storage representation of RadixArk/Qwen3.8-27B-NVFP4. It preserves the exact mixed-precision checkpoint while reorganizing and entropy-coding its stored bits into parallel tile streams. Context-conditioned FP4 tiles require their corresponding scale tensor first.

This is compression of an already quantized NVFP4 checkpoint, not a new quantization, fine-tune, or model architecture. Decoding all three NVLC containers reconstructs the three source safetensors shards byte-for-byte. Tensor names, shapes, values, ModelOpt scales, tokenizer, configuration, and the source model's precision contract are unchanged.

[!IMPORTANT] The weight shards use the custom .nvlc format, not safetensors. Standard transformers.from_pretrained, SGLang, and vLLM loaders cannot consume this repository directly. An NVLC-aware loader and decoder are required. The portable CPU codec and complete format/manifest metadata are included, but a production fused GPU decoder is not bundled. No inference-speed claim is made for this release.

The open-source runtime research implementation is available at TaimurAyaz/Qwen3.8-27B-NVFP4-NVLC. It includes the independent host inverse, tiled GPU reference decoders, exact DGX Spark kernel microgates, and an experimental SGLang integration path. It is not yet presented as a complete compressed-only production serving runtime, and it makes no whole-model TPS claim.

Provenance

The lineage recorded in the repository is:

1. Qwen/Qwen3.8-27B, revision e13a4f0e35203116364e3b3f3f0c82f6ef1afd3c.
2. RadixArk/Qwen3.8-27B-NVFP4, produced with NVIDIA Model Optimizer commit 87c9f8cf83021957d1a1a575c90c9a4eaaf7ef0c using a mixed NVFP4 W4A4 recipe.
3. This repository, which applies only reversible NVLC storage coding to the RadixArk checkpoint.

The source checkpoint uses NVFP4 for MLP and lm_head weights with group size 16, FP8 for attention weights, and source-identical BF16 for MTP and vision tensors. SOURCE_SHA256SUMS identifies the exact three safetensors shards used as the NVLC input. UPSTREAM_README.md preserves the source checkpoint's model card.

Storage result

The complete-container result includes all directories, probability models, tile metadata, alignment, and the embedded safetensors JSON prefixes. The GPU-oriented tiled organization adds 50,094,852 bytes (0.2733%) relative to the earlier serial-rANS proof while enabling independently scheduled entropy-coded tiles and parallel decoder states once any required context tensor is available.

For additional detail, the payload streams alone break down as follows. These rows exclude container-level directories, probability tables, padding, and embedded prefixes, so they do not sum to the complete-container total above.

The 15 MTP BF16 tensors are a named subgroup of the 798 BF16 tensors, not an additional set.

How the codec works

NVLC uses static rANS probability models and preserves the original bit patterns. It does not convert values to a different numerical type.

BF16

Each 16-bit BF16 word is split into two exact symbols:

es = word >> 7       # 9-bit joint sign + exponent
f  = word & 0x7f     # 7-bit fraction

The sign-plus-exponent symbol is coded with a per-tensor 512-symbol model. The fraction is coded with a global, per-container set of 128-symbol distributions selected by the decoded sign-plus-exponent symbol, representing P(f | es). Reconstruction is the bitwise inverse:

word = (es << 7) | f

FP8 E4M3

Each original FP8 byte is a 256-valued rANS symbol. Static FP8 tensors use a per-tensor model. The decoder emits the exact original byte; there is no floating-point conversion or requantization.

Packed NVFP4 E2M1

Each packed 4-bit E2M1 value is coded as a 16-valued symbol. Its probability row is selected using the corresponding already reconstructed FP8 block-scale byte. Two decoded nibbles reconstruct one original byte:

packed = low_nibble | (high_nibble << 4)

Tiles never split the 16-value scale block associated with one scale byte. weight_scale, weight_scale_2, and input_scale reconstruct their exact source representations.

Records that do not benefit from modeling are tiled and stored verbatim.

Kernel-facing organization

The three NVLCT014 version-2 containers provide:

• 97,882 independently scheduled entropy-coded tiles; context-conditioned FP4 tiles require their scale tensor first;
• 32 independent rANS lanes per modeled tile;
• 3,566,528 independent primary/fraction lane streams;
• 128-byte-aligned payload offsets;
• a target decoded tile size of 256 KiB;
• complete K rows in two-dimensional weight tiles, grouped in 32-row units; and
• embedded integrity checks for decoded tiles, tensors, directories, prefixes, models, and complete reconstructed source shards.

SHA256SUMS separately provides integrity checks for the three published NVLC containers, while SOURCE_SHA256SUMS identifies the three safetensors shards used as codec input.

Context dependencies, tensor shapes, codec kinds, tile ranges, and kernel groups are materialized in kernel_manifest.json. A context tensor must be available before decoding a dependent weight tile.

Download

Install the Hugging Face CLI and download the complete repository:

python -m pip install -U huggingface_hub
hf download Taimur/Qwen3.8-27B-NVFP4-NVLC-Lossless \
  --local-dir Qwen3.8-27B-NVFP4-NVLC-Lossless
cd Qwen3.8-27B-NVFP4-NVLC-Lossless

Verify the downloaded NVLC shards on Linux:

sha256sum -c SHA256SUMS

On macOS:

shasum -a 256 -c SHA256SUMS

You can run structural validation without source weights:

python3 codec/inspect_nvlc_tiled.py model-00001-of-00003.nvlc --json
python3 codec/inspect_nvlc_tiled.py model-00002-of-00003.nvlc --json
python3 codec/inspect_nvlc_tiled.py model-00003-of-00003.nvlc --json

See NVLC_FORMAT.md and codec/nvlc_tiled_rans_codec.cpp for the authoritative binary layout and reference inverse.

Runtime implementation

Clone the separate implementation repository for host validation, GPU gates, DGX Spark kernel measurements, and reproducible integration instructions:

git clone https://github.com/TaimurAyaz/Qwen3.8-27B-NVFP4-NVLC.git

The implementation consumes this Hugging Face repository as its only weight input. Its README clearly separates verified microkernel results from unfinished whole-model compressed-only residency work.

File inventory

• model-00001-of-00003.nvlc through model-00003-of-00003.nvlc: complete compressed weight containers.
• model.nvlc.index.json: tensor-to-container mapping.
• kernel_manifest.json: tensor shapes, dtypes, codec kinds, contexts, tile ranges, checksums, and MTP/kernel groups.
• NVLC_FORMAT.md: binary layout and mathematical decoding specification.
• compression.json: byte accounting, format parameters, shard verification, and structural gates.
• SHA256SUMS: SHA-256 checksums of the three NVLC containers.
• SOURCE_SHA256SUMS: SHA-256 provenance checksums of the three source safetensors shards.
• codec/: portable reference encoder/verifier, structural inspector, manifest builders, and encoding manifests.
• qualification.json, qualification-criteria.json, tensor-audit.json, and conversion-manifest.json: source-model conversion, audit, and evaluation evidence.
• config.json, tokenizer files, generation configuration, preprocessors, and chat template: source repository metadata carried forward unchanged.
• UPSTREAM_README.md and LICENSE: source model card and Apache-2.0 license.

Container checksums

Validation evidence

Every source shard passed both the portable exact inverse and the structural validator:

The inverse validation compares all reconstructed source bytes and checks embedded CRC32 values at the tile, tensor, directory, probability-model, safetensors-prefix, and complete-source levels.

The included qualification.json documents the source NVFP4 checkpoint's separate qualification run: 97.2707% GSM8K accuracy (1,283/1,319), no request errors, empty generations, or truncations, and a 100% stop rate. That run used SGLang revision 29481685462732237d80d86076d6563e1f658102 on 4× NVIDIA GB300 with tensor parallelism 4. It is source-checkpoint evidence, not a benchmark of an NVLC-native runtime.

Intended use

This release is intended for research and development of lossless model-storage codecs, direct compressed-weight runtimes, random-access tiled decoders, and fused GPU decode/compute paths. Once correctly decoded, it has the same capabilities and behavioral limitations as the exact RadixArk NVFP4 checkpoint it reconstructs.

Limitations

• The repository is not directly loadable by standard Hugging Face Transformers, SGLang, or vLLM weight loaders.
• A production fused GPU decoder is not included in this model repository. The linked implementation repository contains experimental GPU paths.
• The reference implementation establishes format correctness; it is not presented as a production inference runtime.
• No TPS, latency, throughput, power, or deployed-memory improvement is claimed here. Stored-byte reduction alone does not establish runtime speedup.
• Lossless storage coding does not improve model quality, safety, factuality, or robustness.
• The underlying Qwen model can produce inaccurate, incomplete, biased, or otherwise undesirable output. Evaluate the model for the intended use and apply appropriate safeguards.
• The source checkpoint's documented deployment support is NVIDIA Blackwell; other hardware/runtime combinations are not validated here.

License and attribution

This repository is released under the Apache License 2.0. It is a storage-format derivative of RadixArk/Qwen3.8-27B-NVFP4, itself a quantized derivative of Qwen/Qwen3.8-27B. Please retain the upstream notices and review the upstream model cards for their use guidance and limitations.

Citation

If this artifact is useful in your work, cite the repository:

@misc{qwen38_27b_nvfp4_nvlc_lossless_2026,
  title        = {Qwen3.8-27B-NVFP4-NVLC-Lossless},
  author       = {Taimur},
  year         = {2026},
  howpublished = {Hugging Face model repository},
  url          = {https://huggingface.co/Taimur/Qwen3.8-27B-NVFP4-NVLC-Lossless}
}