ResNet50-ONNX

ResNet50 (ONNX) – Renesas X5H

Introduction

This repository hosts ResNet50 V1 in ONNX FP32 format, targeting the Renesas R-Car X5H platform for image classification inference on the NPX6 NPU.

• Model Architecture: ResNet50 — a 50-layer residual convolutional network for 1000-class image classification.
• Source Model: onnxmodelzoo/resnet50-v1-12 — ONNX Model Zoo resnet50-v1-12
• Task: Image Classification (ImageNet ILSVRC2012, 1000 classes)
• Parameters: 25.6M (25.63M counted from fp32/resnet50_v1_12.onnx initializers)

Deployment Flow

The repository provides the model in FP32 ONNX format. Both supported runtimes automatically cast the FP32 model to INT8 at load time for optimised NPU execution — no separate quantization step is required.

resnet50_v1_12.onnx (FP32)
        │
        ├─▶  ONNX Runtime (Custom NPU EP)  ──▶  INT8 auto-cast  ──▶  NPX6 NPU
        │
        └─▶  MWMX Runtime                  ──▶  INT8 auto-cast  ──▶  NPX6 NPU

Provided Artifacts

INT8 execution is handled automatically by the NPU runtime — no additional quantized model file is needed.

Performance

All HIL results were measured on Renesas R-Car X5H physical hardware.
The FP32 ONNX model is auto-cast to INT8 by the runtime before NPU execution.
PPA Estimator results are software estimates based on model characteristics and hardware configuration.

Benchmark configuration: Single NPU · Single AI Core · Input: 3 × 224 × 224 · Batch size: 1

Inference Latency & Throughput

Accuracy (ImageNet ILSVRC2012 Validation Set — 50 000 images)

---

Runtime Details

ONNX Runtime – Custom NPU Execution Provider

• Engine: ONNX Runtime with Renesas Custom NPU Execution Provider
• Input format: FP32 ONNX (.onnx)
• NPU execution precision: INT8 (auto-cast at load time)
• Execution target: NPX6-48K NPU on R-Car X5H

MWMX Runtime

• Engine: Renesas MWMX (Middleware MX) native inference runtime
• Input format: FP32 ONNX (ingested and compiled by the MWMX toolchain)
• NPU execution precision: INT8 (auto-cast by MWMX toolchain)
• Execution target: NPX6-48K NPU on R-Car X5H

PPA Estimator

• Engine: Renesas PPA Estimator
• Input format: FP32 ONNX
• NPU execution precision: INT8
• Type: Software performance estimate — not measured on physical silicon

---

Prerequisites

To run inference on Renesas R-Car X5H, you need:

1. Renesas R-Car X5H board with NPX6 NPU
2. ONNX Runtime with Renesas NPU Custom Execution Provider, or the Renesas MWMX Runtime package
3. Hugging Face CLI to download the model

Download

hf download Renesas/ResNet50-ONNX --repo-type=model --include "fp32/*"

Inference

ONNX Runtime (Custom NPU Execution Provider)

import onnxruntime as ort
import numpy as np

# Runtime auto-casts FP32 model to INT8 for NPU execution
providers = [("ReneasNPUExecutionProvider", {}), "CPUExecutionProvider"]
sess = ort.InferenceSession("fp32/resnet50_v1_12.onnx", providers=providers)

# Input: ImageNet-normalized image, shape (1, 3, 224, 224), dtype float32
input_data = np.random.randn(1, 3, 224, 224).astype(np.float32)
outputs = sess.run(None, {"data": input_data})
class_scores = outputs[0]  # shape (1, 1000)

MWMX Runtime

Refer to the Renesas MWMX Runtime documentation for compilation and inference scripts targeting the NPX6 NPU on R-Car X5H. The MWMX toolchain ingests the FP32 ONNX model and automatically compiles it for INT8 NPU execution.

---

Benchmark Methodology

• HIL runs: Hardware-in-the-loop — measured on physical R-Car X5H silicon; single NPU, single AI core, 850 MHz NPU clock
• Estimation: PPA Estimator software estimate; single NPU, single AI core, 1066 MHz NPU clock
• Precision: FP32 ONNX input; INT8 execution (auto-cast by runtime)
• Latency: Median over 1000 consecutive inference runs with warm cache
• Throughput: Computed as 1000 / latency_ms
• Accuracy: Evaluated on the ImageNet ILSVRC2012 validation set (50 000 images); softmax Top-1 and Top-5