ResNet18-ONNX

ResNet-18 (ONNX Model Zoo v1.7) – Renesas X5H

Introduction

This repository hosts ResNet-18 as exported by the ONNX Model Zoo v1.7 release, targeting the Renesas R-Car X5H platform for image classification inference on the NPX6 NPU.

Note: This repo is distinct from ResNet50-ONNX, which hosts ResNet50 from the ONNX Model Zoo v1.12 export. The two repositories cover different ONNX Model Zoo export versions (v1.7 vs. v1.12) and different network depths. Do not conflate benchmark numbers between the two. The other ResNet-v1.7 depths (34/101/152) each have their own sibling repo: ResNet34-ONNX, ResNet101-ONNX, ResNet152-ONNX.

• Model Architecture: ResNet-18 — residual convolutional network for 1000-class image classification
• Source Model: onnxmodelzoo/resnet18-v1-7 — ONNX Model Zoo resnet18-v1-7
• Task: Image Classification (ImageNet ILSVRC2012, 1000 classes)
• Parameters: 11.7M

Deployment Flow

The FP32 ONNX model is auto-cast to INT8 by the Renesas MWMX toolchain at compile time — no separate quantization step is required.

resnet18_v1_7_..._optimized.onnx (FP32)
        │
        └─▶  MWMX Runtime  ──▶  INT8 auto-cast  ──▶  NPX6 NPU

Provided Artifacts

Performance

Measured on Renesas R-Car X5H via the MWMX runtime (APM50 ship-performance CI pipeline).

Benchmark configuration: Single NPU · Batch size: 1 · Input resolution: not available from source data (TBD)

Accuracy

TBD — not yet measured/published for this repo.

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Runtime Details

MWMX Runtime

• Engine: Renesas MWMX (Middleware MX) native inference runtime
• Input format: FP32 ONNX (compiled by the MWMX toolchain)
• NPU execution precision: INT8 (auto-cast by MWMX toolchain)
• Execution target: NPX6-48K NPU on R-Car X5H

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Prerequisites

To run inference on Renesas R-Car X5H, you need:

1. Renesas R-Car X5H board with NPX6 NPU
2. Renesas MWMX Runtime
3. Hugging Face CLI to download the model

Download

hf download Renesas/ResNet18-ONNX --repo-type=model --include "fp32/*"

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Benchmark Methodology

• HIL runs: Hardware-in-the-loop — measured on physical R-Car X5H silicon via the MWMX runtime (metawaremx_runtime CI pipeline, "APM50" ship-performance target)
• Precision: FP32 ONNX input; INT8 execution (auto-cast by MWMX)
• Slices: results reported for both 1 AI core and 12 AI cores per NPU instance