HRNet-ONNX

HRNet-W48 (ONNX) – Renesas X5H

Introduction

This repository hosts HRNet-W48, targeting the Renesas R-Car X5H platform for image-classification inference on the NPX6 NPU.

• Model Architecture: HRNet (High-Resolution Network, W48 width) — maintains high-resolution representations throughout the network via parallel multi-resolution branches with repeated cross-resolution fusion, instead of the classic encoder-decoder downsample/upsample path
• Source Model: open-mmlab/mmpretrain
• Task: image-classification (dataset: imagenet-1k)
• Note: This ImageNet-1k classification checkpoint uses the HRNet backbone with a classification head; HRNet is also widely used as a backbone for pose estimation and segmentation.

Deployment Flow

The FP32 ONNX model is auto-cast to INT8 by the Renesas MWMX toolchain at compile time — no separate quantization step is required.

hrnet_w48_3rdparty_8xb32_in1k.onnx (FP32)
        │
        └─▶  MWMX Runtime  ──▶  INT8 auto-cast  ──▶  NPX6 NPU

Provided Artifacts

Performance

Measured on Renesas R-Car X5H via the MWMX runtime (APM80 ship-performance CI pipeline).

Benchmark configuration: Single NPU · Batch size: 1 · Input: 3 × 224 × 224

Accuracy

TBD — not yet measured/published for this repo.

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Runtime Details

MWMX Runtime

• Engine: Renesas MWMX (Middleware MX) native inference runtime
• Input format: FP32 ONNX (compiled by the MWMX toolchain)
• NPU execution precision: INT8 (auto-cast by MWMX toolchain)
• Execution target: NPX6-48K NPU on R-Car X5H

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Prerequisites

To run inference on Renesas R-Car X5H, you need:

1. Renesas R-Car X5H board with NPX6 NPU
2. Renesas MWMX Runtime
3. Hugging Face CLI to download the model

Download

hf download Renesas/HRNet-ONNX --repo-type=model --include "fp32/*"

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Benchmark Methodology

• HIL runs: Hardware-in-the-loop — measured on physical R-Car X5H silicon via the MWMX runtime (metawaremx_runtime CI pipeline, "APM80" ship-performance target)
• Precision: FP32 ONNX input; INT8 execution (auto-cast by MWMX)