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EfficientNet-Lite0-ONNX
Renesas/EfficientNet-Lite0-ONNX
EfficientNet-Lite0-ONNX is a image classification model from Renesas. Use it when you need a label for an image. The card lists the license as apache-2.0.
This repository hosts EfficientNet-Lite0, targeting the Renesas R-Car X5H platform for image-classification inference on the NPX6 NPU.
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Public
Updated Sep 28, 2026
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At a glance
- Task
- Image Classification
- License
- apache-2.0
- Access
- Public
- Created
- Sep 23, 2026
- Updated
- Sep 28, 2026
- SHA
- 062dcf50
Base models
Model card
From the Hugging Face model README
EfficientNet-Lite0 (ONNX) – Renesas X5H
Introduction
This repository hosts EfficientNet-Lite0, targeting the Renesas R-Car X5H platform for image-classification inference on the NPX6 NPU.
- Model Architecture: EfficientNet-Lite — a mobile-optimized EfficientNet variant that replaces squeeze-and-excitation and swish activations with ReLU6 for better integer-quantization and fixed-point-hardware friendliness
- Source Model: timm/tf_efficientnet_lite0.in1k
- Task: image-classification (dataset: imagenet-1k)
Deployment Flow
The FP32 ONNX model is auto-cast to INT8 by the Renesas MWMX toolchain at compile time — no separate quantization step is required.
tf_efficientnet_lite0_in1k.onnx (FP32)
│
└─▶ MWMX Runtime ──▶ INT8 auto-cast ──▶ NPX6 NPU
Provided Artifacts
| Artifact | Status | Notes |
|---|---|---|
| FP32 (ONNX) | ⏳ Pending | fp32/tf_efficientnet_lite0_in1k.onnx — to be added; will be auto-cast to INT8 by the MWMX toolchain at compile time (see Deployment Flow above); no separate INT8 file will be shipped |
Performance
Measured on Renesas R-Car X5H via the MWMX runtime (APM80 ship-performance CI pipeline).
Benchmark configuration: Single NPU · Batch size: 1 · Input: 3 × 224 × 224
| AI Cores | Runtime | Precision | Device | Latency (ms) | Type |
|---|---|---|---|---|---|
| 1 | MWMX Runtime | INT8 (auto) | X5H · 1× NPU · 1 Core · 850 MHz | 1.05 | Measured |
| 3 | MWMX Runtime | INT8 (auto) | X5H · 1× NPU · 3 Core · 850 MHz | 0.85 | Measured |
| 4 | MWMX Runtime | INT8 (auto) | X5H · 1× NPU · 4 Core · 850 MHz | 0.85 | Measured |
| 6 | MWMX Runtime | INT8 (auto) | X5H · 1× NPU · 6 Core · 850 MHz | 0.91 | Measured |
| 12 | MWMX Runtime | INT8 (auto) | X5H · 1× NPU · 12 Core · 850 MHz | 1.11 | Measured |
Accuracy
TBD — not yet measured/published for this repo.
Runtime Details
MWMX Runtime
- Engine: Renesas MWMX (Middleware MX) native inference runtime
- Input format: FP32 ONNX (compiled by the MWMX toolchain)
- NPU execution precision: INT8 (auto-cast by MWMX toolchain)
- Execution target: NPX6-48K NPU on R-Car X5H
Prerequisites
To run inference on Renesas R-Car X5H, you need:
- Renesas R-Car X5H board with NPX6 NPU
- Renesas MWMX Runtime
- Hugging Face CLI to download the model
Download
hf download Renesas/EfficientNet-Lite0-ONNX --repo-type=model --include "fp32/*"
Benchmark Methodology
- HIL runs: Hardware-in-the-loop — measured on physical R-Car X5H silicon via the MWMX
runtime (
metawaremx_runtimeCI pipeline, "APM80" ship-performance target) - Precision: FP32 ONNX input; INT8 execution (auto-cast by MWMX)
- Task
- Image Classification
- License
- apache-2.0
- Created
- Sep 23, 2026
- Updated
- Sep 28, 2026