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PranjalZetsu/Fab_Yield_Agent_Qwen-q4
Fab_Yield_Agent_Qwen-q4 is a text generation model from PranjalZetsu. Use it when you need the model to write or continue text. It is set up for peft.
Developed by: PranjalZetsu - Model type: Causal Language Model fine-tuned via RL (GRPO) - Language(s): English - License: Apache 2.0 - Finetuned from model: Qwen/Qwen2.5-7B-Instruct
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From the Hugging Face model README
Developed by: PranjalZetsu
Model type: Causal Language Model fine-tuned via RL (GRPO)
Language(s): English
License: Apache 2.0
Finetuned from model: Qwen/Qwen2.5-7B-Instruct
| Property | Value |
|---|---|
| Base Model | Qwen/Qwen2.5-7B |
| Adapter Type | LoRA (PEFT) |
| Quantization | 4-bit (bitsandbytes, NF4) |
| Training Framework | Unsloth + TRL (GRPO) |
| PEFT Version | 0.19.1 |
| Task | Text Generation / Agentic Reasoning |
| Domain | Semiconductor Fabrication, Yield Engineering |
Fab_Yield_Agent_Qwen-q4 is a domain-specialized language model fine-tuned for semiconductor fabrication yield analysis and optimization. Built on the Qwen2.5-7B-Instruct architecture and trained using Reinforcement Learning from verifiable rewards (GRPO), this model learns to reason through complex statistical and materials science problems with structured, step-by-step thinking.
Semiconductor manufacturing is one of the most complex industrial processes on Earth. A modern chip fab runs wafers through hundreds of steps, each controlled by multiple physical parameters (temperatures, pressures, gas flows). Even tiny deviations cascade into yield loss. This agent is trained to act as a process integration engineer:
During Reinforcement Learning, the model was rewarded purely on the correctness of final answers—not on intermediate reasoning steps. Spontaneously, it developed:
from transformers import AutoTokenizer, AutoModelForCausalLM
from peft import PeftModel
base_model = "unsloth/Qwen2.5-7B-Instruct-bnb-4bit"
adapter = "PranjalZetsu/Fab_Yield_Agent_Qwen-q4"
tokenizer = AutoTokenizer.from_pretrained(base_model)
model = AutoModelForCausalLM.from_pretrained(base_model, load_in_4bit=True, device_map="auto")
model = PeftModel.from_pretrained(model, adapter)
prompt = """You are a semiconductor yield engineer.
A 300mm fab sees 12% yield loss on a 7nm logic layer.
Defect density: 0.08 defects/cm2. Critical area: 150 cm2.
Perform a yield analysis and recommend corrective actions."""
inputs = tokenizer(prompt, return_tensors="pt").to("cuda")
outputs = model.generate(**inputs, max_new_tokens=1024, temperature=0.6, do_sample=True)
print(tokenizer.decode(outputs[0], skip_special_tokens=True))
# Clone the repository
git clone https://github.com/pranjalyt/fab-yield-agent.git
cd fab-yield-agent
# Install dependencies
pip install -r requirements.txt
# Run the API server
uvicorn server:app --host 0.0.0.0 --port 7860
The project includes a production-grade RL environment (FabYieldEnv) and a Response Surface Model (RSM) simulator.
A hidden ground truth engine that implements a second-order Response Surface Model. It captures non-linear interactions between 15 process parameters (Temperature, Etch Time, Pressure, etc.).
The simulator produces physically motivated defect signatures:
A multi-agent layer that simulates the human approval gate. It enforces episode-varying qualification constraints (min yield, max variance, forbidden ranges).
| Capability | Before RL (SFT only) | After RL (GRPO) |
|---|---|---|
| Yield estimation | States a number | Derives from defect density + critical area |
| Process capability | Rarely mentions | Calculates Cpk from spec limits + sigma |
| Confidence intervals | Absent | Appears spontaneously in reasoning traces |
| Capability | Before RL (SFT only) | After RL (GRPO) |
|---|---|---|
| Film uniformity | Generic description | Linked to deposition mechanism physically |
| Etch selectivity | Surface-level | Reasoned from underlying chemistry |
| Defect root cause | Names defect types | Traces cause to process physics |
This work addresses several frontier AI research themes for OpenEnv India 2026:
| Term | Definition |
|---|---|
| Wafer | A thin silicon disc on which chips are fabricated simultaneously |
| Yield | Percentage of working chips per wafer |
| RSM | Response Surface Methodology - statistical technique mapping inputs to outputs |
| DoE | Design of Experiments - systematic approach to planning experiments |
| Lot | A batch of typically 25 wafers processed together |
| CMP | Chemical-Mechanical Planarization - polishing process to flatten surfaces |
@misc{fab_yield_agent_qwen_q4,
author = {PranjalZetsu},
title = {Fab_Yield_Agent_Qwen-q4: RL-Trained Semiconductor Yield Reasoning Agent},
year = {2025},
publisher = {HuggingFace},
url = {https://huggingface.co/PranjalZetsu/Fab_Yield_Agent_Qwen-q4}
}
For questions or feedback, open a discussion on the Hugging Face Community tab.