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Allomgie/Qwen32B-N64-Decomp-16bit
Qwen32B-N64-Decomp-16bit is a machine learning model from Allomgie. Use it for the machine learning task on the model card, and read the license before you ship it in a product. The card lists the license as apache-2.0.
Quantized variants of [Qwen32B-N64-Decomp-16bit]: https://huggingface.co/Allomgie/Qwen32b-N64-Decomp-GGUF.
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From the Hugging Face model README
Quantized variants of [Qwen32B-N64-Decomp-16bit]: https://huggingface.co/Allomgie/Qwen32b-N64-Decomp-GGUF.
This model is a specialized fine-tune of Qwen2.5-Coder-32B-Instruct, specifically engineered for decompiling MIPS assembly into C code compatible with the SGI IDO 5.3 compiler.
It has been trained in a two-stage process on a verified dataset. The final Stage 2 utilized an 8192-token context length and achieved a mean token accuracy of 96.5% on complex 8k-token samples.
The model focuses on:
Advanced Testing Phase
This is the unquantized 16-bit (BF16) master checkpoint. While it performs exceptionally well and understands complex control flows (e.g. nested ternary operators and switch tables), the output must still be verified by a human.
It acts as an expert assistant for IDO decompilation, not an autonomous compiler.
BF16 (65.5GB) → maximum precision, server use
Q8_0 (ca. 35GB) → near-lossless, RE work
Q6_K (ca. 27GB) → balanced accuracy
Q5_K_M (ca. 23GB) → 24GB GPU optimal
Q4_K_M (ca. 20GB) → consumer fast inference
BF16: ca. 80GB VRAM (H100 / A100 / multi-GPU)
Q8_0: ca. 40GB VRAM
Q6_K: ca. 32GB VRAM
Q5_K_M / Q4_K_M: ca. 24GB VRAM
CPU inference: ≥64GB RAM recommended
The dataset is fully clean-room, compiler-verified, and does NOT include raw copyrighted source leaks.
Every single MIPS-to-C pair in the dataset was verified using the original SGI IDO 5.3 compiler.
The dataset was processed through a custom Compiler-Guided Delta Debugging Pipeline inspired by C-Reduce, but specifically tailored for IDO 5.3.
This pipeline guarantees that the C code is a minimal representation of the target assembly.
Hash Verification
Every C snippet is freshly compiled. The resulting MIPS assembly hash is compared against the target baseline. If they match exactly, the sample is considered valid.
Semantic Noise Reduction
The pipeline removes dead code, unused variables, phantom branches, and non-essential artifacts.
Result
The model learns a near 1:1 mapping of logical C constructs to MIPS instructions while remaining largely free of human formatting bias and unrelated source artifacts.
The dataset consists of over 200,000 strictly validated pairs heavily weighted toward generated, stressed, and reconstructed logic.
To closely align the model with real Nintendo 64 development environments without relying on proprietary source code, the dataset utilizes custom-generated synthetic C files.
These files were algorithmically generated to mimic:
Alongside established generators such as:
CsmithYARPGenthe dataset incorporates deeply nested control flow, complex arithmetic, branch-heavy logic, and intentionally convoluted compiler edge cases.
This forces the model to infer compiler behavior rather than memorize standard functions.
The dataset additionally includes clean-room implementations of:
compiled directly to MIPS-II.
Custom-generated datasets specifically target:
Trained on the full 200k+ dataset using a 4096-token context window.
Primary objectives:
Trained exclusively on a curated "Golden Dataset" of 40,000 highly complex and heavily reduced samples using an 8192-token context window.
Primary objectives:
| Specification | Value |
|---|---|
| Base Model | Qwen2.5-Coder-32B-Instruct |
| Context Length | 8192 tokens |
| Compiler Target | SGI IDO 5.3 (Nintendo 64) |
| Architecture | 32 Billion Parameters |
| Precision | BF16 (~65.5 GB) |
Recommended for professional environments requiring maximum accuracy.
| Version | VRAM / RAM | Recommended Setup |
|---|---|---|
| BF16 | ~70 GB VRAM | 1× H200 (80GB), 2× A100/H100 (40GB), or serverless providers such as Modal / RunPod |
To get valid results, you must follow the Semantic Expert IR – v16 format.
The model expects:
The model does not understand raw disassembler output.
It requires two distinct pieces of input.
Requirements:
Example:
8c2e4e70 lw $t6, %lo(...)($at)
A context object that extracts:
from associated header files and assembly.
Note: The official
asm_cleanup.pyandtechenv_builder.pyscripts are available both in this Hugging Face repository and in the standalone TechEnv Builder repository:Additional details about the Technical Environment structure, schema, and formatting rules can be found in
FORMAT.md.
This model was fine-tuned using the ChatML format.
Wrap your input using:
<|im_start|><|im_end|>and assign the roles correctly.
<|im_start|>system
Decompile N64 MIPS assembly to C (IDO compiler). Use the technical environment for types, struct layouts, and calling context.
<|im_end|>
<|im_start|>user
### Technical Environment:
{
"env": {
"s": {},
"sym": {
"var_6": "int",
"var_7": "unsigned int"
},
"ext": {}
},
"funcs": [
{
"n": "test",
"sf": 56,
"stk": {
"saved": {
"ra": "0x1c",
"gp": "0x18"
},
"locals": {
"blocks": [
{
"off": "0x38",
"size": 24
}
],
"singles": 1
}
},
"mem": [
{
"base": "var_6",
"fields": [
{
"off": "0x0",
"rw": "w"
}
]
}
],
"br": [
{
"op": "beqz"
}
],
"calls": [
{
"type": "direct",
"name": "max",
"argc": 3
}
],
"args": ["a0", "a1", "a2", "a3"],
"argc_conf": "medium",
"ret": "void",
"ret_conf": "medium",
"globals": {
"var_6": "rw",
"var_7": "rw"
}
}
]
}
### MIPS Assembly:
.section .text
glabel test # 0
8f810000 lw $at, %got(var_6)($gp)
27bdffc8 addiu $sp, $sp, -0x38
[...]
03e00008 jr $ra
00000000 nop
endlabel test
<|im_end|>
<|im_start|>assistant
The Technical Environment JSON block is the most critical part of the prompt.
It acts as the model's symbol table and guarantees that memory offsets and registers are mapped to the exact C types used by the IDO compiler.
Omitting this information can cause hallucinations.
env.sStruct definitions extracted from .h files.
env.symGlobal variable declarations and their associated C types.
env.extExternal function signatures. When a function is declared here, args and ret are ground truth and argc_conf / ret_conf are omitted.
funcsMetadata describing the target function.
Includes:
sf → Stack-frame sizestk → Saved registers and local-variable block sizesmem → Memory accesses and read/write flagsargs / ret → Parameter registers and inferred return typeargc_conf / ret_conf → Confidence levels (high, medium, low) when inferred from ASM rather than declared in headersglobals → Summary of which global variables this function reads or writesflags → Instruction-class indicators (e.g. has_fpu, has_64bit)calls[].tail → true for tail calls (j target instead of jal)argsWhen ground truth is available from env.ext, args is an array of objects:
"args": [
{"reg": "a0", "type": "ALCSeq *"},
{"reg": "a1", "type": "s32"}
]
When inferred heuristically from the ASM, args is a string array and argc_conf is present:
"args": ["a0", "a1"],
"argc_conf": "medium"
The SGI IDO compiler translates different C types into entirely different MIPS instructions.
Examples:
lb → signed charlw → intThe Technical Environment prevents the model from generating incorrect casts that would fail binary matching.
| Parameter | Recommendation |
|---|---|
| Temperature | 0.1 – 0.2 |
| Sampling | do_sample=False |
| Search Strategy | Greedy Search |
| max_new_tokens | Scale from 4096 to 8192 depending on function size |
Higher temperatures often produce code that does not compile correctly.
This model is provided "as is" for research and reverse engineering purposes.
The developers are not responsible for:
This model is released under the Apache 2.0 License.